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Semiconductor
Semiconductor MSC23CV43257A-XXBS8
DESCRIPTION
MSC23CV43257A-XXBS8
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4,194,304-Word 32-Bit DRAM MODULE : FAST PAGE MODE TYPE WITH EDO
The Oki MSC23CV43257A-XXBS8 is a fully decoded 4,194,304-word 32-bit CMOS dynamic random access memory composed of eight 16-Mb DRAMs (4M 4) in TSOP packages mounted with decoupling capacitors on a 72-pin glass epoxy Small Outline DIMM Package supports any application where high density and large capacity of storage memory are required.
FEATURES
* 4,194,304-word 32-bit organization * 72-pin Small Outline DIMM * Single 3.3 V supply 0.3 V tolerance * Input : LVTTL compatible * Output : LVTTL compatible, 3-state * Refresh : 2048 cycles/32 ms * CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability * Multi-bit test mode capability * Fast Page Mode with EDO capability
PRODUCT FAMILY
Family Access Time (Max.) tRAC tAA tCAC Power Dissipation Cycle Time Operating (Max.) Standby (Max.) (Min.)
MSC23CV43257A-60BS8 MSC23CV43257A-70BS8
60 ns 70 ns
30 ns 35 ns
15 ns 20 ns
110 ns 130 ns
3456 mW 3168 mW
28.8 mW
345
MSC23CV43257A-XXBS8
Semiconductor
PIN CONFIGURATION
MSC23CV43257A-XXBS8
(Unit : mm) 3.80 Max.
25.4 0.13 3.18 0.13 2.0 0.13 2.62 Typ. *1 44.45 0.1 1.00 0.1 59.69 0.2
1
71
5.5 Min.
R2.0 1.0 0.1 17.78 0.13
1.8 0.1
0.25 Max. 72 2 3.25 Typ. 5.00 R2.0
2 - 1.8
44.45 0.1 51.66 0.1
0.23 Min. 1.27 0.1
3.03
*1 The common size difference of the board width 19.78 mm of its height is specified as 0.2. The value above 19.78 mm is specified as 0.5.
346
Semiconductor Pin Configuration
Pin No. Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VSS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VCC PD1 A0 A1 A2 A3 Pin No. Pin Name 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 A4 A5 A6 A10 NC DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 A7 NC VCC Pin No. Pin Name 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 A8 A9 NC RAS2 DQ15 NC DQ16 DQ17 VSS CAS0 CAS2 CAS3 CAS1 RAS0 NC
MSC23CV43257A-XXBS8
Pin No. Pin Name 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 NC WE NC DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 NC DQ24 DQ25 DQ26 DQ27 DQ28
Pin No. Pin Name 61 62 63 64 65 66 67 68 69 70 71 72 VCC DQ29 DQ30 DQ31 NC PD2 PD3 PD4 PD5 PD6 PD7 VSS
Presence Detect Pins
Pin No. 11 66 67 68 69 70 71 Pin Name PD1 PD2 PD3 PD4 PD5 PD6 PD7 MSC23CV43257A -60BS8 NC NC VSS NC NC NC NC MSC23CV43257A -70BS8 NC NC VSS NC VSS NC NC
347
MSC23CV43257A-XXBS8
Semiconductor
BLOCK DIAGRAM
A0 - A10 RAS0 CAS0 WE A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS CAS1 DQ0 DQ1 DQ2 DQ3 A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS A0 - A10 DQ DQ RAS DQ CAS DQ WE OE VCC VSS CAS3 DQ16 DQ17 DQ18 DQ19
RAS2 CAS2
DQ4 DQ5 DQ6 DQ7
DQ20 DQ21 DQ22 DQ23
DQ8 DQ9 DQ10 DQ11
DQ24 DQ25 DQ26 DQ27
DQ12 DQ13 DQ14 DQ15
DQ28 DQ29 DQ30 DQ31
VCC VSS
C1
C8
348
Semiconductor
MSC23CV43257A-XXBS8
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter Voltage on Any Pin Relative to VSS Voltage VCC Supply Relative to VSS Short Circuit Output Current Power Dissipation Operating Temperature Storage Temperature Symbol VIN, VOUT VCC IOS PD Topr Tstg Rating -0.5 to 4.6 -0.5 to 4.6 50 8 0 to 70 -40 to 125 Unit V V mA W C C
Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions
Parameter Power Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min. 3.0 0 2.0 -0.3 Typ. 3.3 0 -- -- Max. 3.6 0 VCC + 0.3 0.8 (Ta = 0C to 70C) Unit V V V V
Capacitance
Parameter Input Capacitance (A0 - A10) Input Capacitance (WE) Input Capacitance (RAS0, RAS2) Input Capacitance (CAS0 - CAS3) I/O Capacitance (DQ0 - DQ31) Symbol CIN1 CIN2 CIN3 CIN4 CDQ Typ. -- -- -- -- -- Max. 57 65 35 20 16
(Ta = 25C, f = 1 MHz) Unit pF pF pF pF pF
Note : Capacitance measured with Boonton Meter.
349
MSC23CV43257A-XXBS8
Semiconductor
DC Characteristics
MSC23CV43257A Parameter
Symbol
(VCC = 3.3 V 0.3 V, Ta = 0C to 70C) MSC23CV43257A -70BS8 Min. -80 Max. 80 A Unit Note Condition 0 V VI VCC + 0.3 V; -60BS8 Min. Max. 80
Input Leakage Current
ILI
All other pins not under test = 0 V DOUT disable 0 V VO 3.6 V IOH = -2.0 mA IOL = 2.0 mA RAS, CAS cycling, tRC = Min. RAS, CAS = VIH
-80
Output Leakage Current Output High Voltage Output Low Voltage Average Power Supply Current (Operating) Power Supply Current (Standby) Average Power Supply Current (RAS-only Refresh) Average Power Supply Current (CAS before RAS Refresh) Average Power Supply Current (Fast Page Mode)
ILO VOH VOL ICC1
-10 2.4 0 -- -- --
10 VCC 0.4 960 16 8
-10 2.4 0 -- -- --
10 VCC 0.4 880 16 8
A V V mA 1, 2 mA mA 1 1
ICC2
RAS, CAS VCC -0.2 V RAS cycling,
ICC3
CAS = VIH, tRC = Min. RAS cycling,
--
960
--
880
mA 1, 2
ICC6
CAS before RAS, tRC = Min. RAS = VIL,
--
960
--
880
mA 1, 2
ICC7
CAS cycling, tHPC = Min.
--
1120
--
1040
mA 1, 3
Notes: 1. ICC Max. is specified as ICC for output open condition. 2. Address can be changed once or less while RAS=VIL. 3. Address can be changed once or less while CAS=VIH.
350
Semiconductor AC Characteristics (1/2)
MSC23CV43257A-XXBS8
(VCC = 3.3 V 0.3 V, Ta = 0C to 70C) MSC23CV43257A
Symbol
Note 1,2,3,10,11 Unit Note ns ns ns ns ns ns ns ns ns ns ns ns ms ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 5 6 7, 8 7, 8 7 3 4, 5, 6 4, 5 4, 6 4 4
MSC23CV43257A -70BS8 Min. Max. 130 30 -- -- -- -- 0 5 0 0 0 2 -- 50 70 70 20 10 10 45 10 40 20 15 70 0 10 0 15 45 35 -- -- 70 20 35 40 -- -- 20 20 20 50 32 -- 10k 100k -- -- 10k -- -- -- 50 35 -- -- -- -- -- -- --
Parameter Random Read or Write Cycle Time Fast Page Mode Cycle Time Access Time from RAS Access Time from CAS Access Time from Column Address Access Time from CAS Precharge Output Low Impedance Time from CAS Output Hold Time from CAS Low CAS to Data Output Buffer Turn-off Delay Time RAS to Data Output Buffer Turn-off Delay Time WE to Data Output Buffer Turn-off Delay Time Transition Time Refresh Period RAS Precharge Time RAS Pulse Width RAS Pulse Width (Fast Page Mode) RAS Hold Time CAS Precharge Time CAS Pulse Width RAS Low to CAS High Delay Time CAS High to RAS Low Delay Time RAS Hold Time from CAS Precharge RAS to CAS Delay Time RAS to Column Address Delay Time RAS to Second CAS Delay Time Row Address Set-up Time Row Address Hold Time Column Address Set-up Time Column Address Hold Time Column Address Hold Time from RAS Column Address to RAS Lead Time
-60BS8 Min. Max. 110 25 -- -- -- -- 0 5 0 0 0 2 -- 40 60 60 15 10 10 40 10 35 20 15 60 0 10 0 10 40 30 -- -- 60 15 30 35 -- -- 15 15 15 50 32 -- 10k 100k -- -- 10k -- -- -- 45 30 -- -- -- -- -- -- --
tRC tHPC tRAC tCAC tAA tCPA tCLZ tDOH tCEZ tREZ tWEZ tT tREF tRP tRAS tRASP tRSH tCP tCAS tCSH tCRP tRHCP tRCD tRAD tRSCD tASR tRAH tASC tCAH tAR tRAL
351
MSC23CV43257A-XXBS8
Semiconductor
AC Characteristics (2/2)
(VCC = 3.3 V 0.3 V, Ta = 0C to 70C) MSC23CV43257A
Symbol
Note 1,2,3,10,11 Unit Note ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 9 9
MSC23CV43257A -70BS8 Min. Max. 0 0 0 0 15 50 10 10 20 20 0 15 45 10 10 20 10 10 10 20 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Parameter Read Command Set-up Time Read Command Hold Time Read Command Hold Time referenced to RAS Write Command Set-up Time Write Command Hold Time Write Command Hold Time from RAS Write Command Pulse Width Write Command to RAS Lead Time Write Command to CAS Lead Time Data-in Set-up Time Data-in Hold Time Data-in Hold Time from RAS
-60BS8 Min. Max. 0 0 0 0 10 45 10 5 15 15 0 15 40 10 10 20 10 10 10 20 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
tRCS tRCH tRRH tWCS tWCH tWCR tWP tRWL tCWL tDS tDH tDHR
Write Command Pulse Width (Output Disable) tWPE
CAS Active Delay Time from RAS Precharge tRPC RAS to CAS Set-up Time (CAS before RAS) tCSR RAS to CAS Hold Time (CAS before RAS) WE to RAS Precharge Time (CAS before RAS) WE Hold Time from RAS (CAS before RAS) RAS to WE Set-up Time (Test Mode) RAS to WE Hold Time (Test Mode) tCHR tWRP tWRH tWTS tWTH
352
Semiconductor
MSC23CV43257A-XXBS8
Notes:
1. A start-up delay of 200 s is required after power-up, followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. 2. The AC characteristics assume tT = 5 ns. 3. VIH (Min.) and VIL (Max.) are reference levels for measuring input timing signals. Transition times (tT) are measured between VIH and VIL. 4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF. 5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD (Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD (Max.) limit, access time is controlled by tCAC. 6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD (Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD (Max.) limit, access time is controlled by tAA. 7. tCEZ (Max.), tREZ (Max.) and tWEZ (Max.) define the time at which the output achieves the open circuit condition and are not referenced to output voltage levels. 8. tCEZ and tREZ must be satisfied for open circuit condition. 9. tRCH or tRRH must be satisfied for a read cycle. 10. The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet is an 8-bit parallel test function. CA0, CA1 and CA10 are not used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle. The 4M 32 module can be tested as a 512K 32 module in this test mode. 11. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values.
See ADDENDUM I for AC Timing Waveforms
353


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